The present invention is related both to computer architecture and to computer operating systems. Although the present invention has many different alternative embodiments with respect to different, particular computer hardware platforms and computer-operating-system architectures, the present invention can be completely and straightforwardly described with respect to a simplified and generalized conceptualization of virtual-to-physical-address translation for one computer architecture.
FIG. 1 illustrates generalized virtual-to-physical-address translation employed in a wide variety of modern computer systems, and implemented in a wide variety of currently available computer operating systems. A virtual address 101 generally fills a single, naturally sized computer word for a given computer and computer-operating-system architecture. In most systems, a virtual address 101 is stored in a hardware register, and is used by the processor or processors within a computer system to locate a corresponding natural word stored in the computer system's memory hierarchy 131, 137, 139, and 129. The process by which a unit of physical memory corresponding to virtual address is located within physical memory is referred to as “virtual address translation,” and the stored information 109 that facilitates a particular virtual address translation is referred to as a “translation.”
Normally, a virtual address 101 comprises a number of higher-order bits 103 that together compose a virtual page number, and a number of lower-order bits 105 that together compose a page offset. Computer-system hardware and a computer operating system together translate virtual addresses into physical addresses that directly identify a memory location corresponding to the virtual address. Mapping of virtual addresses to physical memory locations provides great flexibility to computer systems with regard to memory implementations. For example, a computer system may provide, through virtual addresses, a much larger process address space than could be accommodated, at a given instance in time, in the physical, random-access memory available within the computer system. In such systems, the computer hardware and a computer operating system collaborate to maintain virtual memory pages most likely to be next accessed in physical memory, and maintain virtual memory pages less likely to be accessed in the near future on larger capacity mass storage devices. Virtual memory pages can migrate from mass storage devices to physical memory and from physical memory to mass storage devices dynamically, as programs execute and access virtual memory. Virtual memory also allows a computer system to provide to each of numerous, concurrently running processors the illusion that each process enjoys private access to an entire virtual-memory address space, and may facilitate security measures, inter-process memory sharing, and provide additional types of benefits to computer operating systems and to computer users.
In an exemplary computer system, during a first virtual-to-physical-address translation, a computer processor, computer-operating-system routine, or a combination of a processor and computer-operating-system software extract the virtual page number 103 from a virtual address stored within a register and use the virtual page number 107 to locate a corresponding entry 109 within a translation look-aside buffer 111. The translation look-aside buffer (“TLB”) 111 stores most recently accessed virtual page translations to assist in virtual-address translation. In many systems, the TLB is stored in specialized, high-speed TLB registers, and is backed up by a lower-speed virtual hash page table (“VHPT”), in turn backed up by translations stored on mass storage devices. For the purpose of the describing the present invention, it is sufficient to understand that the TLB stores a set of current virtual-page-to-physical-page translations to facilitate virtual-to-physical-address translation.
Each TLB entry, such as TLB entry 109, includes a virtual page number 113, a corresponding physical page number 115, many additional fields that may describe privilege level, access rights, protection keys, and other such information used by the operating system to control access to virtual memory pages, represented in FIG. 1 by spaces 117 and 119, and a number of bit flags 121-125. In many computer systems, a bit flag referred to as a “present bit” (bit flag 125 in FIG. 1), indicates whether or not the virtual-memory page currently resides in physical memory. When, during memory access, the present bit indicates that the virtual memory page corresponding to the TLB entry does not currently reside in physical memory, a page fault occurs, and the operating system uses 127 the virtual page number 113 to locate the contents of the virtual page in mass storage 129 and copy the located virtual page into a location in physical memory, such as the L1 cache memory 131, and updates the physical page number 115 to reflect the location in memory in which the contents of the virtual page has been copied from the mass storage 129. By contrast, when the present bit of the TLB entry indicates that the physical page corresponding to the virtual page is resident within memory, the contents of the physical memory location corresponding to the virtual address may be directly accessed 133 by supplying the physical page number 115 and the page offset 105 to a memory subsystem 135, which reads the contents of the physical address from, or writes a value to, the corresponding memory location in one of a tiered system of caches, including the L1 cache 131, the L2 cache 137, and main memory 139. Whether virtual-to-physical-address translation is carried out entirely by processor logic, by the processor under control of firmware, or by the processor under control of operating system software routines depends on the particular computer-system hardware platform and operating system within a computer system. In the exemplary architecture, an access-rights field in each TLB entry specifies the types of access allowed to the virtual memory page corresponding to the TLB entry. Access types include no access, read access, write access, execute access, and a privilege-promotion access used allow execution of operating system code using an enter-privileged-code instruction. The access rights field comprises 3 bits in the exemplary architecture, each of the 8 possible values specifying one or more access rights for each possible privilege level. The value of the access-rights field, combined with the value of a 2-bit privilege-level field within the TLB entry, completely specifies the access rights available to a process running at each of four possible privilege levels.
When an operating system or application program begins execution, or when additional memory is allocated for operating system or program use, a computer system commonly allocates a large number of virtual pages on behalf of the operating system or application program. In many cases, the operating system or application program expects that newly allocated virtual pages are initialized to a default value. The expected default value is commonly the value “0” for each byte within the newly allocated virtual memory page. In many currently available computer systems, the newly allocated virtual memory pages are fully instantiated, meaning that, when sufficient physical memory is available, a physical memory page corresponding to the virtual memory page is assigned for the virtual memory page and that the physical memory page is initialized to the default value.
FIG. 2 illustrates allocation of five virtual memory pages on behalf of a process. As shown in FIG. 2, physical pages 202-206 corresponding to five virtual memory pages are allocated in memory 210, corresponding TLB entries 212-216 are placed into the TLB 218, and the physical pages 202-206 are initialized to contain a default value. In general, virtual memory pages are either immediately initialized, under program control, as part of the virtual-page allocation process, or selected from a pool of pre-initialized pages that are zeroed or otherwise initialized in a background, operating-system process. In either case, initialization of the virtual-memory pages is computationally expensive, and may involve significant time delays for nascent processes or for processes allocating additional memory resources prior to undertaking a particular task. In some cases, a greater number of virtual memory pages are allocated than actually needed by a process, and allocated virtual-memory pages may never be written to, but only read from, or may never be accessed during the life of a process.
Designers, manufactures, and users of computer systems have recognized that allocation of virtual-memory pages for initializing processes, and for processes that dynamically supplement their virtual memory during operation, represents a significant computational and time overhead. Therefore, manufactures, designers, and users of computer systems have recognized the need for systems and methods that efficiently initialize newly allocated virtual-memory pages.